Model { Name "r02a" Version 4.00 SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowStorageClass off ExecutionOrder off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Mon Dec 18 15:25:24 2006" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "Non" ModifiedDateFormat "%" LastModifiedDate "Mon Dec 18 15:48:55 2006" ModelVersionFormat "1.%" ConfigurationManager "None" SimParamPage "Solver" StartTime "0.0" StopTime "10.0" SolverMode "Auto" Solver "ode45" RelTol "1e-3" AbsTol "auto" Refine "1" MaxStep "auto" MinStep "auto" MaxNumMinSteps "-1" InitialStep "auto" FixedStep "auto" MaxOrder 5 OutputOption "RefineOutputTimes" OutputTimes "[]" LoadExternalInput off ExternalInput "[t, u]" SaveTime on TimeSaveName "tout" SaveState off StateSaveName "xout" SaveOutput on OutputSaveName "yout" LoadInitialState off InitialState "xInitial" SaveFinalState off FinalStateName "xFinal" SaveFormat "Array" LimitDataPoints on MaxDataPoints "1000" Decimation "1" AlgebraicLoopMsg "warning" MinStepSizeMsg "warning" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" InheritedTsInSrcMsg "warning" SingleTaskRateTransMsg "none" MultiTaskRateTransMsg "error" IntegerOverflowMsg "warning" CheckForMatrixSingularity "none" UnnecessaryDatatypeConvMsg "none" Int32ToFloatConvMsg "warning" InvalidFcnCallConnMsg "error" SignalLabelMismatchMsg "none" LinearizationMsg "none" VectorMatrixConversionMsg "none" SfunCompatibilityCheckMsg "none" BlockPriorityViolationMsg "warning" ArrayBoundsChecking "none" ConsistencyChecking "none" ZeroCross on Profile off SimulationMode "normal" RTWSystemTargetFile "grt.tlc" RTWInlineParameters off RTWRetainRTWFile off RTWTemplateMakefile "grt_default_tmf" RTWMakeCommand "make_rtw" RTWGenerateCodeOnly off TLCProfiler off TLCDebug off TLCCoverage off AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off ExtModeMexFile "ext_comm" ExtModeBatchMode off ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on OptimizeBlockIOStorage on BufferReuse on ParameterPooling on BlockReductionOpt on RTWExpressionDepthLimit 5 BooleanDataType off BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "r02a" Location [75, 124, 910, 229] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "automatic" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" ZoomFactor "100" ReportName "simulink-default.rpt" Block { BlockType Inport Name "In1" Position [15, 23, 45, 37] Port "1" LatchInput off Interpolate on } Block { BlockType Scope Name "Scope" Ports [1] Position [795, 54, 825, 86] Floating off Location [121, 141, 445, 381] Open off NumInputPorts "1" TickLabels "OneTimeTick" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" } List { ListType SelectedSignals axes1 "" } Grid "on" TimeRange "auto" YMin "0" YMax "2" SaveToWorkspace off SaveName "ScopeData" DataFormat "StructureWithTime" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "0" } Block { BlockType Step Name "Step" Position [15, 55, 45, 85] Time "0" Before "0" After "1" SampleTime "0" VectorParams1D on } Block { BlockType Sum Name "Sum" Ports [2, 1] Position [60, 20, 80, 40] ShowName off IconShape "round" Inputs "|+-" SaturateOnIntegerOverflow on } Block { BlockType TransferFcn Name "Transfer Fcn" Position [220, 12, 520, 48] Numerator "[0.00002 0.0035 0.133 1]" Denominator "[0.007193784 0.21869076 2.493074784 12.63157896" "]" AbsoluteTolerance "auto" Realization "auto" } Block { BlockType TransferFcn Name "Transfer Fcn1" Position [95, 12, 130, 48] Numerator "[30]" Denominator "[1]" AbsoluteTolerance "auto" Realization "auto" } Block { BlockType TransferFcn Name "Transfer Fcn2" Position [155, 12, 205, 48] Numerator "[1]" Denominator "[0.008 1]" AbsoluteTolerance "auto" Realization "auto" } Block { BlockType TransferFcn Name "Transfer Fcn3" Position [535, 12, 575, 48] Numerator "[100]" Denominator "[1]" AbsoluteTolerance "auto" Realization "auto" } Block { BlockType TransferFcn Name "Transfer Fcn4" Position [595, 12, 650, 48] Numerator "[4]" Denominator "[0.025 1]" AbsoluteTolerance "auto" Realization "auto" } Block { BlockType TransferFcn Name "Transfer Fcn5" Position [670, 12, 710, 48] Numerator "[1]" Denominator "[0.1 1]" AbsoluteTolerance "auto" Realization "auto" } Block { BlockType TransferFcn Name "Transfer Fcn6" Position [740, 12, 775, 48] Numerator "[0.002]" Denominator "[1 0]" AbsoluteTolerance "auto" Realization "auto" } Block { BlockType Outport Name "Out1" Position [790, 23, 820, 37] Port "1" OutputWhenDisabled "held" InitialOutput "[]" } Line { SrcBlock "Transfer Fcn2" SrcPort 1 DstBlock "Transfer Fcn" DstPort 1 } Line { SrcBlock "Transfer Fcn" SrcPort 1 DstBlock "Transfer Fcn3" DstPort 1 } Line { SrcBlock "Transfer Fcn1" SrcPort 1 DstBlock "Transfer Fcn2" DstPort 1 } Line { SrcBlock "Sum" SrcPort 1 DstBlock "Transfer Fcn1" DstPort 1 } Line { SrcBlock "Transfer Fcn3" SrcPort 1 DstBlock "Transfer Fcn4" DstPort 1 } Line { SrcBlock "Transfer Fcn4" SrcPort 1 DstBlock "Transfer Fcn5" DstPort 1 } Line { SrcBlock "Transfer Fcn5" SrcPort 1 DstBlock "Transfer Fcn6" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Sum" DstPort 1 } Line { SrcBlock "Transfer Fcn6" SrcPort 1 DstBlock "Out1" DstPort 1 } } }